Software Drivers
Main Page | Data Structures | File List | Data Fields | Globals

xtmrctr_l.h File Reference


Detailed Description

This header file contains identifiers and low-level driver functions (or macros) that can be used to access the device. The user should refer to the hardware device specification for more details of the device operation. High-level driver functions are defined in xtmrctr.h.

 MODIFICATION HISTORY:

 Ver   Who  Date     Changes
 ----- ---- -------- -----------------------------------------------
 1.00b jhl  04/24/02 First release
 1.10b mta  03/21/07 Updated to new coding style
 


Register Offset Definitions

Register offsets within a timer counter, there are multiple timer counters within a single device

#define XTC_TCSR_OFFSET
#define XTC_TLR_OFFSET
#define XTC_TCR_OFFSET

Control Status Register Bit Definitions

Control Status Register bit masks Used to configure the timer counter device.

#define XTC_CSR_ENABLE_ALL_MASK
#define XTC_CSR_ENABLE_PWM_MASK
#define XTC_CSR_INT_OCCURED_MASK
#define XTC_CSR_ENABLE_TMR_MASK
#define XTC_CSR_ENABLE_INT_MASK
#define XTC_CSR_LOAD_MASK
#define XTC_CSR_AUTO_RELOAD_MASK
#define XTC_CSR_EXT_CAPTURE_MASK
#define XTC_CSR_EXT_GENERATE_MASK
#define XTC_CSR_DOWN_COUNT_MASK
#define XTC_CSR_CAPTURE_MODE_MASK

Defines

#define XTC_DEVICE_TIMER_COUNT
#define XTimerCtr_mReadReg(BaseAddress, TmrCtrNumber, RegOffset)
#define XTmrCtr_mWriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
#define XTmrCtr_mSetControlStatusReg(BaseAddress, TmrCtrNumber, RegisterValue)
#define XTmrCtr_mGetControlStatusReg(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mGetTimerCounterReg(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mSetLoadReg(BaseAddress, TmrCtrNumber, RegisterValue)
#define XTmrCtr_mGetLoadReg(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mEnable(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mDisable(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mEnableIntr(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mDisableIntr(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mLoadTimerCounterReg(BaseAddress, TmrCtrNumber)
#define XTmrCtr_mHasEventOccurred(BaseAddress, TmrCtrNumber)


Define Documentation

#define XTC_CSR_AUTO_RELOAD_MASK
 

In compare mode, configures the timer counter to reload from the Load Register. The default mode causes the timer counter to hold when the compare value is hit. In capture mode, configures the timer counter to not hold the previous capture value if a new event occurs. The default mode cause the timer counter to hold the capture value until recognized.

#define XTC_CSR_CAPTURE_MODE_MASK
 

Enables the timer to capture the timer counter value when the external capture line is asserted. The default mode is compare mode.

#define XTC_CSR_DOWN_COUNT_MASK
 

Configures the timer counter to count down from start value, the default is to count up.

#define XTC_CSR_ENABLE_ALL_MASK
 

Enables all timer counters

#define XTC_CSR_ENABLE_INT_MASK
 

Enables the interrupt output.

#define XTC_CSR_ENABLE_PWM_MASK
 

Enables the Pulse Width Modulation

#define XTC_CSR_ENABLE_TMR_MASK
 

Enables only the specific timer

#define XTC_CSR_EXT_CAPTURE_MASK
 

Enables the external input to the timer counter.

#define XTC_CSR_EXT_GENERATE_MASK
 

Enables the external generate output for the timer.

#define XTC_CSR_INT_OCCURED_MASK
 

If bit is set, an interrupt has occured. If set and '1' is written to this bit position, bit is cleared.

#define XTC_CSR_LOAD_MASK
 

Loads the timer using the load value provided earlier in the Load Register, XTC_TLR_OFFSET.

#define XTC_DEVICE_TIMER_COUNT
 

Defines the number of timer counters within a single hardware device. This number is not currently parameterized in the hardware but may be in the future.

#define XTC_TCR_OFFSET
 

Timer counter register

#define XTC_TCSR_OFFSET
 

Control/Status register

#define XTC_TLR_OFFSET
 

Load register

#define XTimerCtr_mReadReg BaseAddress,
TmrCtrNumber,
RegOffset   ) 
 

Read one of the timer counter registers.

Parameters:
BaseAddress contains the base address of the timer counter device.
TmrCtrNumber contains the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
RegOffset contains the offset from the 1st register of the timer counter to select the specific register of the timer counter.
Returns:
The value read from the register, a 32 bit value.
Note:
C-Style signature: u32 XTmrCtr_mReadReg(u32 BaseAddress, u8 TimerNumber, unsigned RegOffset);

#define XTmrCtr_mDisable BaseAddress,
TmrCtrNumber   ) 
 

Disable a timer counter such that it stops running.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mDisable(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mDisableIntr BaseAddress,
TmrCtrNumber   ) 
 

Disable the interrupt for a timer counter.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mDisableIntr(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mEnable BaseAddress,
TmrCtrNumber   ) 
 

Enable a timer counter such that it starts running.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mEnable(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mEnableIntr BaseAddress,
TmrCtrNumber   ) 
 

Enable the interrupt for a timer counter.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mEnableIntr(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mGetControlStatusReg BaseAddress,
TmrCtrNumber   ) 
 

Get the Control Status Register of a timer counter.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
The value read from the register, a 32 bit value.
Note:
C-Style signature: u32 XTmrCtr_mGetControlStatusReg(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mGetLoadReg BaseAddress,
TmrCtrNumber   ) 
 

Get the Load Register of a timer counter.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
The value read from the register, a 32 bit value.
Note:
C-Style signature: u32 XTmrCtr_mGetLoadReg(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mGetTimerCounterReg BaseAddress,
TmrCtrNumber   ) 
 

Get the Timer Counter Register of a timer counter.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
The value read from the register, a 32 bit value.
Note:
C-Style signature: u32 XTmrCtr_mGetTimerCounterReg(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mHasEventOccurred BaseAddress,
TmrCtrNumber   ) 
 

Determine if a timer counter event has occurred. Events are defined to be when a capture has occurred or the counter has roller over.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Note:
C-Style signature: int XTmrCtr_mHasEventOccurred(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mLoadTimerCounterReg BaseAddress,
TmrCtrNumber   ) 
 

Cause the timer counter to load it's Timer Counter Register with the value in the Load Register.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mLoadTimerCounterReg(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_mSetControlStatusReg BaseAddress,
TmrCtrNumber,
RegisterValue   ) 
 

Set the Control Status Register of a timer counter to the specified value.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
RegisterValue is the 32 bit value to be written to the register.
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mSetControlStatusReg(u32 BaseAddress, u8 TmrCtrNumber,u32 RegisterValue);

#define XTmrCtr_mSetLoadReg BaseAddress,
TmrCtrNumber,
RegisterValue   ) 
 

Set the Load Register of a timer counter to the specified value.

Parameters:
BaseAddress is the base address of the device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
RegisterValue is the 32 bit value to be written to the register.
Returns:
None.
Note:
C-Style signature: void XTmrCtr_mSetLoadReg(u32 BaseAddress, u8 TmrCtrNumber, u32 RegisterValue);

#define XTmrCtr_mWriteReg BaseAddress,
TmrCtrNumber,
RegOffset,
ValueToWrite   ) 
 

Write a specified value to a register of a timer counter.

Parameters:
BaseAddress is the base address of the timer counter device.
TmrCtrNumber is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
RegOffset contain the offset from the 1st register of the timer counter to select the specific register of the timer counter.
ValueToWrite is the 32 bit value to be written to the register.
Note:
C-Style signature: void XTmrCtr_mWriteReg(u32 BaseAddress, u8 TimerNumber, unsigned RegOffset, u32 ValueToWrite);