Xilinx Processor IP Library
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Defines
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XMPMC_CALIB_RST_CTRL_OFFSET :
xmpmc_hw.h
XMPMC_CLB_RST_CTL_DEF_ON_RST_MASK :
xmpmc_hw.h
XMPMC_CSREG_DBG_CTRL_MASK :
xmpmc_hw.h
XMPMC_CSREG_DEV_FAMILY_MASK :
xmpmc_hw.h
XMPMC_CSREG_ECC_CTRL_MASK :
xmpmc_hw.h
XMPMC_CSREG_MEM_TYPE_MASK :
xmpmc_hw.h
XMPMC_CSREG_MEM_WIDTH_MASK :
xmpmc_hw.h
XMPMC_CSREG_MPMC_CTRL_MASK :
xmpmc_hw.h
XMPMC_CSREG_NUM_PORTS_MASK :
xmpmc_hw.h
XMPMC_CSREG_PHY_CTRL_MASK :
xmpmc_hw.h
XMPMC_CSREG_PM_CTRL_MASK :
xmpmc_hw.h
XMPMC_CTRL_STATUS_OFFSET :
xmpmc_hw.h
XMPMC_DGIE_GIE_MASK :
xmpmc_hw.h
XMPMC_DGIE_OFFSET :
xmpmc_hw.h
XMPMC_ECC_DBG_BYTE_ACC_ENB_MASK :
xmpmc_hw.h
XMPMC_ECC_DEBUG_OFFSET :
xmpmc_hw.h
XMPMC_ECC_RD_WR_DATA0_MASK :
xmpmc_hw.h
XMPMC_ECC_RD_WR_DATA1_MASK :
xmpmc_hw.h
XMPMC_ECC_RD_WR_DATA2_MASK :
xmpmc_hw.h
XMPMC_ECC_RD_WR_DATA3_MASK :
xmpmc_hw.h
XMPMC_ECC_READ_DATA_OFFSET :
xmpmc_hw.h
XMPMC_ECC_WRITE_DATA_OFFSET :
xmpmc_hw.h
XMPMC_ECCADDR_OFFSET :
xmpmc_hw.h
XMPMC_ECCCR_FORCE_DE_MASK :
xmpmc_hw.h
XMPMC_ECCCR_FORCE_PE_MASK :
xmpmc_hw.h
XMPMC_ECCCR_FORCE_SE_MASK :
xmpmc_hw.h
XMPMC_ECCCR_OFFSET :
xmpmc_hw.h
XMPMC_ECCCR_RE_MASK :
xmpmc_hw.h
XMPMC_ECCCR_WE_MASK :
xmpmc_hw.h
XMPMC_ECCDEC_OFFSET :
xmpmc_hw.h
XMPMC_ECCPEC_OFFSET :
xmpmc_hw.h
XMPMC_ECCSEC_OFFSET :
xmpmc_hw.h
XMPMC_ECCSR_DE_MASK :
xmpmc_hw.h
XMPMC_ECCSR_ERR_RNW_MASK :
xmpmc_hw.h
XMPMC_ECCSR_ERR_RNW_SHIFT :
xmpmc_hw.h
XMPMC_ECCSR_ERR_SIZE_MASK :
xmpmc_hw.h
XMPMC_ECCSR_ERR_SIZE_SHIFT :
xmpmc_hw.h
XMPMC_ECCSR_OFFSET :
xmpmc_hw.h
XMPMC_ECCSR_PE_MASK :
xmpmc_hw.h
XMPMC_ECCSR_SE_MASK :
xmpmc_hw.h
XMPMC_ECCSR_SE_SYND_MASK :
xmpmc_hw.h
XMPMC_ECCSR_SE_SYND_SHIFT :
xmpmc_hw.h
XMPMC_IPIER_OFFSET :
xmpmc_hw.h
XMPMC_IPISR_OFFSET :
xmpmc_hw.h
XMPMC_IPIXR_DE_IX_MASK :
xmpmc_hw.h
XMPMC_IPIXR_PE_IX_MASK :
xmpmc_hw.h
XMPMC_IPIXR_SE_IX_MASK :
xmpmc_hw.h
XMpmc_mReadReg :
xmpmc_hw.h
XMpmc_mWriteReg :
xmpmc_hw.h
XMPMC_PM_DATABIN_ACCESS_READ :
xmpmc_hw.h
XMPMC_PM_DATABIN_ACCESS_REG_OFFSET :
xmpmc_hw.h
XMPMC_PM_DATABIN_ACCESS_WRITE :
xmpmc_hw.h
XMPMC_PM_DATABIN_NUM_MAX :
xmpmc_hw.h
XMPMC_PM_DATABIN_NUM_MIN :
xmpmc_hw.h
XMPMC_PM_DATABIN_PORT_REG_OFFSET :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL0 :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL1 :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL2 :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL3 :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL4 :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL5 :
xmpmc_hw.h
XMPMC_PM_DATABIN_QUAL_REG_OFFSET :
xmpmc_hw.h
XMPMC_PM_PORT0 :
xmpmc.h
XMPMC_PM_PORT1 :
xmpmc.h
XMPMC_PM_PORT2 :
xmpmc.h
XMPMC_PM_PORT3 :
xmpmc.h
XMPMC_PM_PORT4 :
xmpmc.h
XMPMC_PM_PORT5 :
xmpmc.h
XMPMC_PM_PORT6 :
xmpmc.h
XMPMC_PM_PORT7 :
xmpmc.h
XMPMC_PMCLR_OFFSET :
xmpmc_hw.h
XMPMC_PMCTRL_OFFSET :
xmpmc_hw.h
XMPMC_PMDATABIN_OFFSET :
xmpmc_hw.h
XMPMC_PMDCC_OFFSET :
xmpmc_hw.h
XMPMC_PMGCC_OFFSET :
xmpmc_hw.h
XMPMC_PMREG_PM0_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM1_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM2_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM3_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM4_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM5_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM6_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM7_MASK :
xmpmc_hw.h
XMPMC_PMREG_PM_ALL_MASK :
xmpmc_hw.h
XMPMC_PMSTATUS_OFFSET :
xmpmc_hw.h
XMPMC_S3_CALIB_REG_OFFSET :
xmpmc_hw.h
XMPMC_S3_CALIB_STATUS_OFFSET :
xmpmc_hw.h
XMPMC_S3CR_DQS_ENB_MASK :
xmpmc_hw.h
XMPMC_S3CR_OUT_DQS_DIV_ENB_MASK :
xmpmc_hw.h
XMPMC_S3CR_OUT_DQS_DIV_MASK :
xmpmc_hw.h
XMPMC_S3CR_OUT_DQS_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_CNT_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_DEL_SEL_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_ENB_TRANS_TWO_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_PHA_CNT_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_RST_CLB_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_TRANS_ONE_MASK :
xmpmc_hw.h
XMPMC_S3CS_DBG_TRANS_TWO_MASK :
xmpmc_hw.h
XMPMC_SPIR_DCM_DONE_MASK :
xmpmc_hw.h
XMPMC_SPIR_DCM_PSEN_MASK :
xmpmc_hw.h
XMPMC_SPIR_DCM_PSINCDEC_MASK :
xmpmc_hw.h
XMPMC_SPIR_DCM_TAP_VALUE_MASK :
xmpmc_hw.h
XMPMC_SPIR_FIRST_RST_DONE_MASK :
xmpmc_hw.h
XMPMC_SPIR_INIT_DONE_MASK :
xmpmc_hw.h
XMPMC_SPIR_OFFSET :
xmpmc_hw.h
XMPMC_SPIR_RDDATA_CLK_SEL_MASK :
xmpmc_hw.h
XMPMC_SPIR_RDDATA_SWAP_RISE_MASK :
xmpmc_hw.h
XMPMC_SPIR_RDEN_DELAY_MASK :
xmpmc_hw.h
XMPMC_SPIR_RDEN_DELAY_SHIFT :
xmpmc_hw.h
XMPMC_V4_CALIB_DQ_TAP_CNT0_OFFSET :
xmpmc_hw.h
XMPMC_V4_CALIB_DQS_GROUP0_OFFSET :
xmpmc_hw.h
XMPMC_V4_CALIB_DQS_TAP_GROUP0_OFFSET :
xmpmc_hw.h
XMPMC_V4_CALIB_REG_OFFSET :
xmpmc_hw.h
XMPMC_V4_CALIB_STATUS_OFFSET :
xmpmc_hw.h
XMPMC_V4CDG_BYTE_ALIGN_MASK :
xmpmc_hw.h
XMPMC_V4CDG_DLY_RD_FALL_MASK :
xmpmc_hw.h
XMPMC_V4CDG_RD_SEL_MASK :
xmpmc_hw.h
XMPMC_V4CDG_RDEN_DLY_MASK :
xmpmc_hw.h
XMPMC_V4CDQSTC_TAP_CNT_DEC_MASK :
xmpmc_hw.h
XMPMC_V4CDQSTC_TAP_CNT_INC_MASK :
xmpmc_hw.h
XMPMC_V4CDQSTC_TAP_CNT_MASK :
xmpmc_hw.h
XMPMC_V4CDQTC_DLY_EN_MASK :
xmpmc_hw.h
XMPMC_V4CDQTC_TAP_CNT_DEC_MASK :
xmpmc_hw.h
XMPMC_V4CDQTC_TAP_CNT_INC_MASK :
xmpmc_hw.h
XMPMC_V4CDQTC_TAP_CNT_MASK :
xmpmc_hw.h
XMPMC_V4CR_FRC_INIT_DONE_MASK :
xmpmc_hw.h
XMPMC_V4CR_FRC_INIT_DONE_VAL_MASK :
xmpmc_hw.h
XMPMC_V4CR_HW_CLB_ON_RST_MASK :
xmpmc_hw.h
XMPMC_V4CR_IDLY_CTL_RDY1_MASK :
xmpmc_hw.h
XMPMC_V4CR_IDLY_CTL_RDYO_MASK :
xmpmc_hw.h
XMPMC_V4CR_MIG_INIT_DONE_MASK :
xmpmc_hw.h
XMPMC_V4CS_DONE_STS_MASK :
xmpmc_hw.h
XMPMC_V4CS_ERR_STS_MASK :
xmpmc_hw.h
XMPMC_V4CS_SEL_DONE_MASK :
xmpmc_hw.h
XMPMC_V5_CALIB_DQ_TAP_CNT0_OFFSET :
xmpmc_hw.h
XMPMC_V5_CALIB_DQS_GROUP0_OFFSET :
xmpmc_hw.h
XMPMC_V5_CALIB_DQS_TAP_CNT0_OFFSET :
xmpmc_hw.h
XMPMC_V5_CALIB_GATE_TAP_CNT0_OFFSET :
xmpmc_hw.h
XMPMC_V5_CALIB_REG_OFFSET :
xmpmc_hw.h
XMPMC_V5_CALIB_STATUS_OFFSET :
xmpmc_hw.h
XMPMC_V5CDG_GATE_DLY_MASK :
xmpmc_hw.h
XMPMC_V5CDG_RD_SEL_MASK :
xmpmc_hw.h
XMPMC_V5CDG_RDEN_DLY_MASK :
xmpmc_hw.h
XMPMC_V5CDQSTC_TAP_CNT_DEC_MASK :
xmpmc_hw.h
XMPMC_V5CDQSTC_TAP_CNT_INC_MASK :
xmpmc_hw.h
XMPMC_V5CDQSTC_TAP_CNT_MASK :
xmpmc_hw.h
XMPMC_V5CDQTC_TAP_CNT_DEC_MASK :
xmpmc_hw.h
XMPMC_V5CDQTC_TAP_CNT_INC_MASK :
xmpmc_hw.h
XMPMC_V5CDQTC_TAP_CNT_MASK :
xmpmc_hw.h
XMPMC_V5CGTC_TAP_CNT_DEC_MASK :
xmpmc_hw.h
XMPMC_V5CGTC_TAP_CNT_INC_MASK :
xmpmc_hw.h
XMPMC_V5CGTC_TAP_CNT_MASK :
xmpmc_hw.h
XMPMC_V5CR_FRC_INIT_DONE_MASK :
xmpmc_hw.h
XMPMC_V5CR_FRC_INIT_DONE_VAL_MASK :
xmpmc_hw.h
XMPMC_V5CR_HW_CLB_ON_RST_MASK :
xmpmc_hw.h
XMPMC_V5CR_IDLY_CTL_RDY1_MASK :
xmpmc_hw.h
XMPMC_V5CR_IDLY_CTL_RDYO_MASK :
xmpmc_hw.h
XMPMC_V5CR_MIG_INIT_DONE_MASK :
xmpmc_hw.h
XMPMC_V5CS_BIT_ERR_INDEX_MASK :
xmpmc_hw.h
XMPMC_V5CS_DONE_STS_MASK :
xmpmc_hw.h
XMPMC_V5CS_ERR_STS_MASK :
xmpmc_hw.h
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